　　PLD器件的逻辑功能描述一般分为原理图描述和硬件描述语言描述，原理图描述是一种直观简便的方法，它可以将现有的小规模集成电路实现的功能直接用PLD器件来实现，而不必去将现有的电路用语言来描述，但电路图描述方法无法做到简练；硬件描述语言描述是可编程器件设计的另一种描述方法，语言描述可能精确和简练地表示电路的逻辑功能，现在在PLD的设计过程中广泛使用，并且有更加浒的趋势，常用的硬件描述语言有ABEL,VHDL语言等，其中ABEL是一种简单的硬件描述语言，其支持布尔方程、真值表、状态机等逻辑描述，适用于计数器、译码器、运算电路、比较器等逻辑功能的描述；VHDL语言是一种行为描述语言，其编程结构类似于计算机中的C语言，在描述复杂逻辑设计时，非常简洁，具有很强的逻辑描述和仿真能力，是未来硬件设计语言的主流。

2.计算机软件的编程及模拟

　　不管是用硬件描述语言描述的逻辑还是用原理图描述的逻辑，必须通过计算机软件对其进行编译，将其描述转换为经过化简的布尔代数表达式（即通常的最简与或表达式），编译软件再根据器件的特点将表达式适配进具体的器件，最终形成PLD器件的熔断丝文件（通常叫做JEDEC文件,简称为JED文件）。
　　通常在将用户设计的逻辑下载到具体器件中前，为了检查设计的结果是否正确，通常可以通过计算机软件进行模拟，检查其设计结果是不否与设计要求相符。

　　GAL编程，一般可以使用ABEL语言编程，ABEL的语法基本上是由一组逻辑表达式进行叙述，一片GAL能帮我完成什么功能呢？或者说能改
变成什么样的芯片呢？对GAL来说，由于内部的逻辑电路（门）比较少，一般只能完成一些简单的逻辑转换、简单的计数器(位数少)、锁存器
等。一般简单来讲，GAL的可用输入比输出多，如果想用他做地址译码器是比较合适的，在单片机的应用中，往往需要用几个不同的门电路组
合或加上138之类的3-8译码器组合，译出几个特定地址，这才是GAL的专长，可以在一个芯片内完成，使得你的电路简洁，而且输入输出在不
违背基本约定的前提下可以随意调换，使得布板走线容易。先看看下面的一个例子：
有时候我需要两组不同的互不关联的逻辑电路，我们也可以用一个GAL完成，只要引脚和内部宏单元够用，例如下面我设计了一个LED七
段码的译码器，还有IO富裕，则我可以利用多余的IO设计一个简单的地址译码电路，下面的程序是为了使一般的七段码LED数码管显示多几个
特殊字符，使用了5条输入数据线，多余的IO我们独立的制作了一个任意逻辑电路：

module BCD7

similar to the 7449
"       f| g |b
"         ---           笔段定义
"       e| d |c
"         ---
        bcd7 device 'P16V8R';



        bcd     = [D4,D3,D2,D1,D0];
        led     = [a,b,c,d,e,f,g];

                          " 共阳结构数码管

@dcset
truth_table (   bcd -> [ a , b , c , d , e , f , g ])
                0   -> [ ON, ON, ON, ON, ON, ON, OFF];     "0
                1   -> [OFF, ON, ON, OFF, OFF, OFF, OFF];     "1
                2   -> [ ON, ON, OFF, ON, ON, OFF, ON];     "2
                3   -> [ ON, ON, ON, ON, OFF, OFF, ON];     "3
                4   -> [OFF, ON, ON, OFF, OFF, ON, ON];     "4
                5   -> [ ON, OFF, ON, ON, OFF, ON, ON];     "5
                6   -> [ ON, OFF, ON, ON, ON, ON, ON];     "6
                7   -> [ ON, ON, ON, OFF, OFF, OFF, OFF];     "7
                8   -> [ ON, ON, ON, ON, ON, ON, ON];     "8
                9   -> [ ON, ON, ON, ON, OFF, ON, ON];     "9
                10 -> [ ON, ON, ON, OFF, ON, ON, ON];     "A
                11 -> [OFF, OFF, ON, ON, ON, ON, ON];     "b
                12 -> [OFF, OFF, OFF, ON, ON, OFF, ON];     "c
                13 -> [OFF, ON, ON, ON, ON, OFF, ON];     "d
                14 -> [ ON, OFF, OFF, ON, ON, ON, ON];     "E
                15 -> [ ON, OFF, OFF, OFF, ON, ON, ON];     "F
                16 -> [OFF, ON, ON, OFF, ON, ON, ON];     "H
                17 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                18 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                19 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                20 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                21 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                22 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                23 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                24 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                25 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                26 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                27 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                28 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                29 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                30 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                31 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];

truth_table (   [OI2 , OI1, OI0] -> [ OOC ])        "多余IO制作一个门电路
                [   0,   0,   0] -> [ 1 ];        "这个逻辑关系可以随意设定
                [   1,   0,   0] -> [ 0 ];
                [   0,   1,   0] -> [ 0 ];
                [   0,   0,   1] -> [ 0 ];
                [   1,   1,   0] -> [ 0 ];
                [   1,   0,   1] -> [ 0 ];
                [   0,   1,   1] -> [ 0 ];
                [   1,   1,   1] -> [ 1 ];

"校对部分
test_vectors ( bcd -> [ a , b , c , d , e , f , g ])
                0   -> [ ON, ON, ON, ON, ON, ON, OFF];     "0
                1   -> [OFF, ON, ON, OFF, OFF, OFF, OFF];     "1
                2   -> [ ON, ON, OFF, ON, ON, OFF, ON];     "2
                3   -> [ ON, ON, ON, ON, OFF, OFF, ON];     "3
                4   -> [OFF, ON, ON, OFF, OFF, ON, ON];     "4
                5   -> [ ON, OFF, ON, ON, OFF, ON, ON];     "5
                6   -> [ ON, OFF, ON, ON, ON, ON, ON];     "6
                7   -> [ ON, ON, ON, OFF, OFF, OFF, OFF];     "7
                8   -> [ ON, ON, ON, ON, ON, ON, ON];     "8
                9   -> [ ON, ON, ON, ON, OFF, ON, ON];     "9
                10 -> [ ON, ON, ON, OFF, ON, ON, ON];     "A
                11 -> [OFF, OFF, ON, ON, ON, ON, ON];     "b
                12 -> [OFF, OFF, OFF, ON, ON, OFF, ON];     "c
                13 -> [OFF, ON, ON, ON, ON, OFF, ON];     "d
                14 -> [ ON, OFF, OFF, ON, ON, ON, ON];     "E
                15 -> [ ON, OFF, OFF, OFF, ON, ON, ON];     "F
                16 -> [OFF, ON, ON, OFF, ON, ON, ON];     "H
                17 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                18 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                19 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                20 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                21 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                22 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                23 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                24 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                25 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                26 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                27 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                28 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                29 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                30 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
                31 -> [OFF, OFF, OFF, OFF, OFF, OFF, OFF];
"附加逻辑电路校对
test_vectors ( [OI2 , OI1, OI0] -> [ OOC ])
                [   0,   0,   0] -> [ 1 ];
                [   1,   0,   0] -> [ 0 ];
                [   0,   1,   0] -> [ 0 ];
                [   0,   0,   1] -> [ 0 ];
                [   1,   1,   0] -> [ 0 ];
                [   1,   0,   1] -> [ 0 ];
                [   0,   1,   1] -> [ 0 ];
                [   1,   1,   1] -> [ 1 ];
end BCD7
以上这个例程都是用abel3编译的，GAL编程并不很复杂，作为一般应用，如果想动手的可以到本站下载ABEL3软件。有关这个软件的安装使用方法，请阅读解压后的READ.ME。安装ABEL3。
           ABEL-HDL基本逻辑运算符号

运算符	优先级	功能	例子	含义
!	1	取反	!(AB)	(AB)的非
&	2	与运算	A&B	A·B
#	3	或运算	A#B	A+B
$	4	异或运算	A$B	A⊕B
=		赋值	A=5	将5赋给A
==		数值相等	A==1	用于判断数值相等
!=		数值不等	A!=1	用于判断数值不等

ABEL-HDL基本算术运算符号

运算符	功能	举例	含义
+	算术加	C=A+B	将A与B相加，将积再赋给C
-	算术减
*	算术乘
/	算术除
<<,>>	左，右移位	A<<B	将A左移B位

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